The USB specification is intended to facilitate the interoperation of devices from different vendors in an open architecture. USB data is encoded using differential signalling (viz. two wires transfer the information) in the form of the difference between the signal levels of those two wires. The USB specification is intended as an enhancement to the PC architecture, spanning portable, desktop and home environments.
The USB specification assumes that devices differ. This is true for the intended environments in which devices from a multiplicity of manufacturers are connected, but there exist other environments (such as certain common industrial or laboratory environments) that require a specification for operating multiple devices of a similar nature in a synchronized manner. The specification does not sufficiently address this issue. Such environments are typically those where testing, measuring or monitoring is performed, and which require the devices to be synchronized to a more accurate degree than is specified. The USB specification allows limited inter-device synchronization by providing a 1 kHz clock signal to all devices. However, many laboratory and industrial environments require synchronization at megahertz frequencies and higher.
USB employs a tiered star topology, where hubs provide attachment points for USB devices. The USB host controller which is located on the user's personal computer (PC), laptop or personal digital assistant (PDA) contains the root hub, which is the origin of all USB ports in the system. The root hub provides a number of USB ports to which USB functional devices or additional hubs may be attached.
In turn, one can attach more hubs (such as USB composite device) to any of these ports, which then provide additional attachment points via ports for further USB devices. In this way, USB allows a maximum of 127 devices (including hubs) to be connected, with the restriction that any device may be at most 5 levels deep.
The root hub in the host transmits a Start of Frame (SOF) signal packet every 1 ms to every device, the time between two SOF packets being termed a frame. Each module receives this SOF packet at a different time, allowing for electrical delays inherent in USB topology. The topology implies that there may be a significant time delay (specified as ≦380 ns) for receiving the same signal between a device that is connected directly to the host controller and a device, which is 5 levels down. This is a severe restriction when there is a need to synchronize devices at megahertz levels and above. Furthermore the USB specification allows the host controller to fail to transmit up to five consecutive SOF tokens.
Current synchronization between a USB host and a USB device is possible by two types of USB transfers, Interrupt and Isochronous. Interrupt transfers allow guaranteed polling frequencies of devices with minimum periods of 125 μs, whereas isochronous transfers guarantee a constant transfer rate. Both methods require there to be traffic between the device and host for synchronization to take place and therefore reserve more bandwidth for higher degrees of synchronization. This unfortunately means that the available USB bandwidth can be used up before the maximum number of devices has been connected. This approach also places on the host the great computational burden of keeping 127 devices synchronized to the host by means of software, yet still fails to address maintaining synchrony between the devices as to the host the individual devices represent separate processes.
Devices that contain a physical transducer of some kind, such as a laser diode or a photodetector, may require clock and trigger information. Such devices, such as a laser diode with a modulated light output at 1 MHz, may use a clock signal to perform transducer functions at regular intervals or at a constant frequency. A trigger signal is usually used to start or end an operation at a set time. In the laser diode example, a trigger signal could be used to turn the modulated light output on or off.
These clock and trigger signals or information (referred to below as synchronization information) can be used to synchronize a multiplicity of devices to each other, provided the signals are common and simultaneous to all devices. ‘Common’ and ‘simultaneously’ here mean that the variation in time of these signals between the devices is less than a specified quantity, δt. In the laser diode example, this would enable a multiplicity of laser diodes to modulate their light output at one frequency. The modulation frequency of all devices would be the same, and their waveforms would be in-phase. The current USB specification (viz. 2.0) allows for delays in δt of up to 0.35 μs. For a signal with a frequency of 1 MHz and a period of 1.0 μs, this delay represents almost half of the period. It is thus unusable as specified as a synchronization signal for routine use.
Devices like hubs and USB controller chips commonly use some amount of phase locking in order to decode the USB protocol. It is the purpose of the SYNC pattern in the USB protocol to provide a synchronization pattern for another electronic circuit to lock to. However, this is intended to synchronize the device to the USB bit streams to an accuracy sufficient to interpret MHz bit streams. It is not intended to synchronize two separate devices with each other to an accuracy required by many test and measurement instruments. The USB specification—to the extent that it deals with inter-device synchronization—is mainly concerned with synchronizing a USB-CD audio stream sufficiently for output on a USB-speaker pair. The requirements of such an arrangement are in the kHz range and, for this, the USB provides ideal conditions. However, the specification does not address the potential problems of synchronizing 100 USB-speaker pairs.
As discussed above, USB communication transfers data during regular 1 ms frames or—in the case of the High-Speed USB specification—in eight micro-frames per 1 ms frame. A Start of Frame (SOF) packet is transmitted to all but Low-Speed devices at the beginning of each frame and to all High-Speed devices at the beginning of each micro-frame. The SOF packet therefore represents a periodic low resolution signal broadcast to all but Low-Speed devices connected to a given Host Controller.
This SOF packet broadcast occurs at a nominal frequency of 1 kHz. However the USB specification allows a very large frequency tolerance (by instrumentation standards) of some 500 ppm (parts per million). The background art utilises this low resolution frequency signal that is broadcast to each of the devices to provide clock synchronization, but only to the somewhat ambiguous frequency provided by the USB Host Controller.
U.S. Pat. No. 6,343,364 (Leydier et al.) discloses an example of frequency locking to USB traffic, which is directed toward a smart card reader. This patent teaches a local, free-running clock that is compared to USB SYNC and packet ID streams; its period is updated to match this frequency, resulting in a local clock with a nominal frequency of 1.5 MHz. This provides a degree of synchronization sufficient to read the smart card information into the host PC.
As this approach is directed to a smart card reader, inter-device synchronization is not addressed. Further, neither a frequency lock to 1 kHz or better stability nor high accurate phase control is disclosed.
U.S. Pat. No. 6,012,115 and subsequent continuation U.S. Pat. No. 6,226,701 (Chambers et al.) addresses the USB SOF periodicity and numbering for timing. As explained in the abstracts of these disclosures, the invention allows a computer system to perform an accurate determination of the moment in time a predetermined event occurred within a real-time peripheral device by using the start of frame pulse transmitted from a USB host controller to peripheral devices connected to it.
However these approaches do not measure the frequency of a periodic data structure contained within the USB data traffic for determination of the absolute frequency of the master clock in the USB Host Controller, and in some cases rely on the provision of an additional counter in the host.
U.S. Pat. No. 6,092,210 (Larky et al.) discloses a method for connecting two USB hosts for the purpose of data transfer, by employing a USB-to-USB connecting device for synchronizing local device clocks to the data streams of both USB hosts. Phase locked loops are used to synchronize local clocks and over-sampling is used to ensure that data loss does not occur. This document, however, relates to the synchronization of the data streams of two USB hosts with each other (and with limited accuracy) such that transfer of information is then possible between said Hosts. The invention does not teach about the synchronization of a multiplicity of USB devices to a single USB Host or to a plurality of USB hosts.
The USB specification was written with audio applications in mind, and U.S. Pat. No. 5,761,537 (Sturges et al.) describes how to synchronize two or more pairs of speakers with individual clocks, where one pair operates off a stereo audio circuit in the PC and the other pair is controlled by the USB. Since both speaker pairs use their own clocks, they need to be synchronized so this document teaches one technique for maintaining synchronization of the audio signals despite possible clock skew between the asynchronous clocks.
U.S. patent application Ser. No. 10/620,769 discloses a synchronized version of the USB, in which the local clock of each device is synchronized on a given USB to an arbitrary degree. This document also discloses a method and apparatus for providing a trigger signal to each device within the USB such that an event may be synchronously initiated on multiple devices by the trigger signal.
U.S. Pat. No. 6,904,489 (Zarns) discloses methods and systems for remotely accessing a USB device, in which a requesting device (such as a personal computer) issues a request for a USB device, the request is intercepted and packaged and then transmitted over a network. The packet is received by a USB host device, and the request is unpackaged and passed to the controller for processing by the USB device.
FIG. 1 is a schematic diagram of an exemplary background art synchronized USB device 10, connected to a digital USB 12, a clock signal and synchronization bus 14, and including a digitally controlled transducer 16. The device 10 also includes a bus connector 18, digital I/O bus interface circuitry 20, a microprocessor 22, and synchronization channel 24 for passing synchronization information including trigger and clock signals to the transducer 16.
The device 10 is connected by means of the bus connector 18 to a digital USB 12 containing USB data and control signals for the USB device 10; clock signal and synchronization bus 14 provides clock and synchronization signals.
Another synchronized USB device, disclosed in U.S. patent application Ser. No. 10/620,769, is shown schematically at 10′ in FIG. 2. Like reference numerals have been used to refer to like features in FIG. 1. In device 10′, clock signals are generated locally to the synchronized USB device 10′ by decoding information present in the data stream of USB 12, through bus connector 18. In this device, all synchronization is provided through USB 12 using standard USB cables and connectors (rendering the clock signal and synchronization bus 14 of FIG. 1 unnecessary). Synchronization channel 26 provides synchronization information including trigger and clock signals to digital transducer 16.
This architecture for synchronization of the local clock on each of a plurality of USB devices relies on periodic data structures present in the USB traffic. The preferred embodiment of U.S. patent application Ser. No. 10/620,769 essentially locks the local clock in frequency and phase to the detection of a SOF packet token at the USB device.
FIG. 3 is a schematic representation of another embodiment of U.S. patent application Ser. No. 10/620,769. In this embodiment, a synchronization channel 26 operates by detecting and extracting information from a USB 12 as USB signal traffic passes through to digital I/O bus interface circuitry 20 (not shown in this figure), and by generating both a local clock signal 28 and a local trigger signal 30.
This embodiment employs circuitry to observe traffic through the USB and decode all SOF packets, which results in a pulse once every 1 ms. The local clock signal 28, from a controlled oscillator clock 32, is locked to the reception of the USB 1 kHz SOF packet in both phase and frequency.
This first requires the local high speed clock signal 28 from clock 23—which may be, say, 1 MHz—to be divided by a clock frequency divider 34 down to the frequency of the SOF packet reception (nominally at 1 kHz). Matched filter 36 sends a clock synch signal 38 when a SOF packet arrives, which passes to a phase detector 40. The phase detector 40 is coupled to the controlled oscillator clock 32 via a filter 42.
The local clock signal 28 is subsequently supplied to the transducer circuitry on the USB device (i.e. digital transducer 16 in FIGS. 1 and 2), thus ensuring that all devices attached to the root hub are locked in frequency to the point at which they receive the SOF packet token.
This arrangement is said to be able to produce a local clock signal to arbitrarily high frequencies, such as a clock frequency of tens of megahertz, and thereby to ensure that the local clock of each device connected to a given USB is synchronized in frequency. U.S. patent application Ser. No. 10/620,769 also teaches a method and apparatus to further synchronize multiple local clocks in phase by measurement of signal propagation time from the host to each device and provision of clock phase compensation on each of the USB devices.
However, the approach described in patent application Ser. No. 10/620,769 is limited in its ability to provide a precisely known clock frequency to each device. The arrangement described above by reference to FIG. 3 locks the frequency of each local clock to the reception of the SOF packet token. The rate of SOF packet generation is driven by the local crystal oscillator on a host PC. This is generally inaccurate and the USB specification has a very large tolerance on clock frequency and subsequent SOF rate. The USB specification dictates that the host controller must send a SOF packet at a rate of 12 MHz±500 ppm (parts per million), that is, 12 MHz±0.05%.
This is a very large tolerance for clocks. For example, a standard crystal oscillator has a central frequency tolerance of approximately 20 ppm with temperature stability of approximately±50 ppm across the usable temperature range. Even this tolerance is unacceptable for highly accurate clock systems. Time critical systems often require temperature stabilised crystal oscillators with centre frequency tolerance and temperature stability of approximately 5 ppm or better.
U.S. patent application Ser. No. 10/620,769 also teaches a method of controlling the synchronized USB clock frequency by manufacture of a special USB host controller with local clock of precisely controlled reference frequency. Such a system would then produce a USB data stream with 1 kHz SOF clock accuracy of a few parts per million. This device is likely to be too costly to see widespread implementation in the highly competitive personal computer market; further, systems such as laptop computers and PDAs (personal digital assistants) have no provision to add on an aftermarket USB host controller.
U.S. Pat. No. 6,226,701 (Chambers et al.) discloses a system for time-stamping real-time events within a USB, employing multiple counters and comparing elapsed time since USB SOF packets. This system requires a counter in both the USB device and the USB Host Controller to be activated by SOF tokens. The counter in the device is activated by the external event and stopped by the next SOF. The counter in the Host controller is reset and started by each SOF. The USB host controller interrogates the peripheral device which transfers data to the host controller indicating (i) that an event has occurred, and (ii) the time before start of frame value of the first timer. The USB host controller interrupts the host processor and transfers to it the data related to the peripheral device. In this way the system of this document can determine the elapsed time since the external event occurred and the processor read the second timer.
However, while the system of Chambers et al. can perform basic event time-stamping, it requires a specific hardware implementation of the USB Host Controller and is therefore not compatible with a generic implementation of USB. Furthermore, that system relies on PC interrupt features and the associated timing restrictions of the real-time clock of the Host PC.